Lightweight Strategy for XOR PUFs as Security Primitives for Resource-constrained IoT device

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained IoT devices. And the XOR Arbiter PUF (XOR-PUF) is one of the most studied PUFs, out of an effort to improve the resistance against machine learning attacks of probably the most lightweight delay-based PUFs - the Arbiter PUFs. However, recent attack studies reveal that even XOR-PUFs with large XOR sizes are still not safe against machine learning attacks. Increasing PUF stages or components and using different challenges for different components are two ways to improve the security of APUF-based PUFs, but more stages or components lead to more hardware cost and higher operation power, and different challenges for different components require the transmission of more bits during operations, which also leads to higher power consumption. In this paper, we present a strategy that combines the choice of XOR Arbiter PUF (XOR-PUF) architecture parameters with the way XOR-PUFs are used to achieve lightweights in hardware cost and energy consumption as well as security against machine learning attacks. Experimental evaluations show that with the proposed strategy, highly lightweight component-differentially challenged XOR-PUFs can withstand the most powerful machine learning attacks developed so far and maintain excellent intra-device and inter-device performance, rendering this strategy a potential blueprint for the fabrication and use of XOR-PUFs for resource-constrained IoT applications.Comment: arXiv admin note: text overlap with arXiv:2206.0131

A Fast Deep Learning Method for Security Vulnerability Study of XOR PUFs

Physical unclonable functions (PUF) are emerging as a promising alternative to traditional cryptographic protocols for IoT authentication. XOR Arbiter PUFs (XPUFs), a group of well-studied PUFs, are found to be secure against machine learning (ML) attacks if the XOR gate is large enough, as both the number of CRPs and the computational time required for modeling n-XPUF increases fast with respect to n, the number of component arbiter PUFs. In this paper, we present a neural network-based method that can successfully attack XPUFs with significantly fewer CRPs and shorter learning time when compared with existing ML attack methods. Specifically, the experimental study in this paper shows that our new method can break the 64-bit 9-XPUF within ten minutes of learning time for all of the tested samples and runs, with magnitudes faster than the fastest existing ML attack method, which takes over 1.5 days of parallel computing time on 16 cores

A Subspace Pre-Learning Strategy to Break the Interpose PUF

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained IoT devices. A critical aspect of PUF security research is to identify all potential security risks. This information about vulnerabilities is beneficial for both PUF developers and PUF-using application developers in terms of designing new PUFs to mitigate existing risks and avoid vulnerable PUFs. Recently, a PUF structure called Interpose PUF (IPUF) was proposed, which claims to be resistant to reliability attacks and machine learning modeling attacks. Related studies on this secure PUF design have demonstrated that some IPUFs can still be broken, but large IPUFs may remain secure against all known modeling attacks. In addition, all these studies either focus on plain challenge–response pair attacks or require prior knowledge of IPUF architecture implementation. However, depending on the claim of attack resistance to reliability attacks, we can employ a different attack approach to break IPUFs. In this paper, we describe a subspace pre-learning-based attack method that can rapidly and accurately break the IPUFs that were treated as secure in the earlier study, revealing a vulnerability in IPUFs if the open interface conforms to the way challenge–response data are accessed by the subspace pre-learning-based attack method

A Subspace Pre-Learning Strategy to Break the Interpose PUF

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained IoT devices. A critical aspect of PUF security research is to identify all potential security risks. This information about vulnerabilities is beneficial for both PUF developers and PUF-using application developers in terms of designing new PUFs to mitigate existing risks and avoid vulnerable PUFs. Recently, a PUF structure called Interpose PUF (IPUF) was proposed, which claims to be resistant to reliability attacks and machine learning modeling attacks. Related studies on this secure PUF design have demonstrated that some IPUFs can still be broken, but large IPUFs may remain secure against all known modeling attacks. In addition, all these studies either focus on plain challenge–response pair attacks or require prior knowledge of IPUF architecture implementation. However, depending on the claim of attack resistance to reliability attacks, we can employ a different attack approach to break IPUFs. In this paper, we describe a subspace pre-learning-based attack method that can rapidly and accurately break the IPUFs that were treated as secure in the earlier study, revealing a vulnerability in IPUFs if the open interface conforms to the way challenge–response data are accessed by the subspace pre-learning-based attack method

Vehicle Classification Using Deep Feature Fusion and Genetic Algorithms

Vehicle classification is a challenging task in the area of image processing. It involves the classification of various vehicles based on their color, model, and make. A distinctive variety of vehicles belonging to various model categories have been developed in the automobile industry, which has made it necessary to establish a compact system that can classify vehicles within a complex model group. A well-established vehicle classification system has applications in security, vehicle monitoring in traffic cameras, route analysis in autonomous vehicles, and traffic control systems. In this paper, a hybrid model based on the integration of a pre-trained Convolutional Neural Network (CNN) and an evolutionary feature selection model is proposed for vehicle classification. The proposed model performs classification of eight different vehicle categories including sports cars, luxury cars and hybrid power-house SUVs. The used in this work is derived from Stanford car dataset that contains almost 196 cars and vehicle classes. After performing appropriate data preparation and preprocessing steps, feature learning and extraction is carried out using pre-trained VGG16 first that learns and extracts deep features from the set of input images. These features are then taken out of the last fully connected layer of VGG16, and feature optimization phase is carried out using evolution-based nature-inspired optimization model Genetic Algorithm (GA). The classification is performed using numerous SVM kernels where Cubic SVM achieves an accuracy of 99.7% and outperforms other kernels as well as excels in terns of performance as compared to the existing works

Robustness and Unpredictability for Double Arbiter PUFs on Silicon Data: Performance Evaluation and Modeling Accuracy

Classical cryptographic methods that inherently employ secret keys embedded in non-volatile memory have been known to be impractical for limited-resource Internet of Things (IoT) devices. Physical Unclonable Functions (PUFs) have emerged as an applicable solution to provide a keyless means for secure authentication. PUFs utilize inevitable variations of integrated circuits (ICs) components, manifest during the fabrication process, to extract unique responses. Double Arbiter PUFs (DAPUFs) have been recently proposed to overcome security issues in XOR PUF and enhance the tolerance of delay-based PUFs against modeling attacks. This paper provides comprehensive risk analysis and performance evaluation of all proposed DAPUF designs and compares them with their counterparts from XOR PUF. We generated different sets of real challenge–response pairs CRPs from three FPGA hardware boards to evaluate the performance of both DAPUF and XOR PUF designs using special-purpose evaluation metrics. We show that none of the proposed designs of DAPUF is strictly preferred over XOR PUF designs. In addition, our security analysis using neural network reveals the vulnerability of all DAPUF designs against machine learning attacks